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Ownership of developing the specification, micro architecture, and RTL design of modules as per requirements. Contribute/influence Chip Architecture. Provide Technical and managerial Leadership to Digital Design Engineers in the Design of IPs and functional blocks. Guide Junior design engineers working on the development of timing constraints, lint checks, synthesis, and Static-timing-analysis. Co-work with the verification and PD team for coverage and timing closure respectively. Lint check and Clock domain crossing analysis Sanity Synthesis runs. Support post silicon debug activities Hire , mentor, and guide design engineers technically and managerially. Minimum BTech/BE degree in Electrical/Electronics. ...
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