SoC Design Engineer - RTL, Verification & Low-Power ICs

MaxLinear, Inc. in Singapore is hiring a SOC Design Engineer for its SoC Front End Design team. The role involves designing state-of-the-art ICs for the wireless connectivity market, focusing on RTL design using VHDL/Verilog. Candidates should have a degree in Electrical/Electronics Engineering and experience with DSM SoC design. Fresh graduates are encouraged to apply. This position offers an opportunity to work in a multicultural team and contribute to innovative projects in a challenging environment.
#J-18808-Ljbffr