About the Role
We are now looking for a Senior ASIC Verification Engineer to verify and implement the world’s leading Smart Network Interface Cards (Smart-NICs) and Data Processing Units (DPUs).
NVIDIA’s Networking Chip Design group works on Smart-NICs and DPUs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications.
What you will be doing:
Be responsible for verifying the smartNIC designs, architecture and micro-architecture using advanced verification methodologies.
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