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About the Role
Senior Analog Engineering Manager
Job Description
Technical Leadership (DDR5 / DDR6)
+ Own and guide the architecture, design, and implementation of DDR5 PHYs and contribute to DDR6-ready architectures.
+ Provide technical oversight for critical analog and mixed-signal blocks, including:
+ High-speed TX/RX datapaths
+ Advanced equalization, termination, and training circuits
+ DLL/PLL-based clocking solutions for multi-GHz operation
+ Voltage, reference generation, and power-aware IO design
+ Drive closure on timing, jitter, noise, SI/PI, and PVT robustness for aggressive DDR5/DDR6 data rates.
+ Ensure compliance with JEDEC DDR5 specifications and alignment with evolving DDR6 standards and industry direction.
+ Lead post-silicon bring-up, characterization, debug, and yield improvement, including lab and customer-system correlation.
People & Organization Leadership
+ Build, lead, and mentor a team of analog and mixed-s...
Job Description
Technical Leadership (DDR5 / DDR6)
+ Own and guide the architecture, design, and implementation of DDR5 PHYs and contribute to DDR6-ready architectures.
+ Provide technical oversight for critical analog and mixed-signal blocks, including:
+ High-speed TX/RX datapaths
+ Advanced equalization, termination, and training circuits
+ DLL/PLL-based clocking solutions for multi-GHz operation
+ Voltage, reference generation, and power-aware IO design
+ Drive closure on timing, jitter, noise, SI/PI, and PVT robustness for aggressive DDR5/DDR6 data rates.
+ Ensure compliance with JEDEC DDR5 specifications and alignment with evolving DDR6 standards and industry direction.
+ Lead post-silicon bring-up, characterization, debug, and yield improvement, including lab and customer-system correlation.
People & Organization Leadership
+ Build, lead, and mentor a team of analog and mixed-s...
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