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About the Role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key Responsibilities
+ Design and develop system-level AVIP solutions for emulation/prototyping platforms (Palladium, Protium)
+ Build and integrate Accelerated Verification IP environments for complex SoC and subsystem validation
+ Develop end-to-end verification flows including:
+ AVIP integration
+ Testbench and system modeling
+ Bare-metal / driver-level validation
+ Architect scalable solutions for multi-protocol system validation across multiple clock domains
+ Optimize solutions for performance, scalability, and emulation efficiency
+ Develop custom test cases, tools, and automation to enable advanced use models (embedded / co-emulation / hybrid flows)
+ Work closely with cross-functional teams (PE, AE, customers) to debug and resolve system-level issues
+ Contrib...
Key Responsibilities
+ Design and develop system-level AVIP solutions for emulation/prototyping platforms (Palladium, Protium)
+ Build and integrate Accelerated Verification IP environments for complex SoC and subsystem validation
+ Develop end-to-end verification flows including:
+ AVIP integration
+ Testbench and system modeling
+ Bare-metal / driver-level validation
+ Architect scalable solutions for multi-protocol system validation across multiple clock domains
+ Optimize solutions for performance, scalability, and emulation efficiency
+ Develop custom test cases, tools, and automation to enable advanced use models (embedded / co-emulation / hybrid flows)
+ Work closely with cross-functional teams (PE, AE, customers) to debug and resolve system-level issues
+ Contrib...
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