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About the Role
Job Title: Lead DFT Engineer
Experience: 7+ Years
Location: Bangalore
Employment Type: Full-time
Industry: Semiconductors / ASIC / So C Design
Job Summary:
We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex So C/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with cross-functional teams, and ensure world-class testability and manufacturability of silicon products.
Key Responsibilities:
Define and drive DFT strategy and architecture for multiple ASIC/So C projects.
Lead implementation and verification of DFT features like:
Scan insertion and compression (e.g., EDT)
ATPG pattern generation and fault grading
MBIST and Logic BIST insertion and validation
Boundary scan (IEEE 1149.1/1149.6), IJTAG (1687)
Manage end-to-end DFT flow — from RTL to gate-level netlist and silicon bring-up.
Collaborate with RTL, STA, PD, and test engineering teams for seamless ...
Experience: 7+ Years
Location: Bangalore
Employment Type: Full-time
Industry: Semiconductors / ASIC / So C Design
Job Summary:
We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex So C/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with cross-functional teams, and ensure world-class testability and manufacturability of silicon products.
Key Responsibilities:
Define and drive DFT strategy and architecture for multiple ASIC/So C projects.
Lead implementation and verification of DFT features like:
Scan insertion and compression (e.g., EDT)
ATPG pattern generation and fault grading
MBIST and Logic BIST insertion and validation
Boundary scan (IEEE 1149.1/1149.6), IJTAG (1687)
Manage end-to-end DFT flow — from RTL to gate-level netlist and silicon bring-up.
Collaborate with RTL, STA, PD, and test engineering teams for seamless ...
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