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Intern: Application Engineering - Formal Verification

Cadence Design Systems, Inc. • Belo Horizonte, Brazil

📍 Location
Belo Horizonte
⏰ Job Type
Part time
📅 Posted
June 18, 2026

About the Role

Description

:

  • Activities focused on the Formal Verification field as mentioned above, mentored by experienced colleague, and reporting to higher management.

  • Provide technical support to customers and field personnel in RTL verification solutions focused on the Jasper tool.

  • ​ Conduct root cause analysis and provide resolution to customer technical issues.

  • Run customer test cases to verify problems, create workarounds when possible, test and deliver R&D fixes.

  • Close collaboration with R&D on issues using established protocols.

  • Author application notes and help provide feedback on documentation.

  • Use scripting languages like TCL for flow development, automation and enhancing design methodologies.

    • Requirements:

  • Ongoing Bachelor in Electrical Engineering, Control and Automation Engineering, Systems Engineering, Electronics Engineering, Computer Science...

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