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About the Role
Join Intel's innovative team as a Senior Mixed Signal Design Engineer specializing in static timing analysis and analog circuit verification. This role offers a hybrid work model starting remotely from Toronto.
As a member of Intel’s mixed-signal IP development team, you will leverage your analog design skills while collaborating with architects to ensure robust design outcomes. Your focus will be on timing closure and enhancing verification methodologies, crucial for Intel's emerging technologies.
Key Responsibilities:
• Lead the execution of static timing analysis for designs
• Optimize timing and constraints for mixed-signal systems
• Execute analog design tasks with Cadence ADE
• Analyze simulation results for design compliance
• Collaborate to troubleshoot and resolve testbench issues
Requirements:
• Bachelor’s degree in a STEM field, preferably Electrical Engineering
• 2+ years of experience with mixed-signal verification
• Proficient in scripting...
As a member of Intel’s mixed-signal IP development team, you will leverage your analog design skills while collaborating with architects to ensure robust design outcomes. Your focus will be on timing closure and enhancing verification methodologies, crucial for Intel's emerging technologies.
Key Responsibilities:
• Lead the execution of static timing analysis for designs
• Optimize timing and constraints for mixed-signal systems
• Execute analog design tasks with Cadence ADE
• Analyze simulation results for design compliance
• Collaborate to troubleshoot and resolve testbench issues
Requirements:
• Bachelor’s degree in a STEM field, preferably Electrical Engineering
• 2+ years of experience with mixed-signal verification
• Proficient in scripting...
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