Full Chip Timing Modeling and Integration Engineer

Job Details

Altera is seeking highly qualified candidates to join our Full Chip Timing team. Altera continues to deliver industry‑leading (FPGA) field‑programmable gate array solutions to customers. As a Full Chip Engineer you will develop timing methodologies and execute full‑chip timing for Altera’s next‑generation product lines in the world’s most advanced process technologies. This fast‑paced dynamic environment requires working with a high‑performance design team to deliver next‑generation FPGA products.

Responsibilities

• Develop timing methodologies and perform full‑chip timing analysis.
• Collaborate with Front End and Back End teams on clocking and constraints development.
• Understand extraction issues, design margins, timing signoff, and quality checks.
• Participate in debug and troubleshooting for a wide variety of tasks, including difficult and critical design issues and proactive intervention.
• Define timing ...