← Back to opportunities
About the Role
Design the future of computing as a Full Chip Floorplan Engineer at AMD. Leverage your expertise in physical design and full-chip floorplanning to shape silicon success across innovative products.
At AMD, you will be an integral part of the Physical Design integration team, focusing on translating SoC RTL into effective chip-level structures. Your role encompasses critical decision-making in early design phases, optimizing timing, power, and area while collaborating closely with multiple teams. Strong hands-on experience in full-chip floorplanning is essential for excelling in this position.
Key Responsibilities:
• Own full-chip floorplanning processes including partitioning and macro placement
• Translate RTL into comprehensive full-chip floorplans
• Plan pins and bus topology for signal integrity
• Optimize floorplan parameters for power and performance
• Collaborate with architecture, RTL, and DFT/DFX teams
Requirements:
• Proven experience in SoC physical...
At AMD, you will be an integral part of the Physical Design integration team, focusing on translating SoC RTL into effective chip-level structures. Your role encompasses critical decision-making in early design phases, optimizing timing, power, and area while collaborating closely with multiple teams. Strong hands-on experience in full-chip floorplanning is essential for excelling in this position.
Key Responsibilities:
• Own full-chip floorplanning processes including partitioning and macro placement
• Translate RTL into comprehensive full-chip floorplans
• Plan pins and bus topology for signal integrity
• Optimize floorplan parameters for power and performance
• Collaborate with architecture, RTL, and DFT/DFX teams
Requirements:
• Proven experience in SoC physical...
Ready to Join Through a Referral?
Apply now and get connected directly with the hiring team
Apply for this Position