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About the Role
Hi All,
Modernize Chip Solutions( A Chip level Design company) Hiring for Design Verification Engineers
Ex p- 5+ yrs
Location - Bengaluru
Notice perio d- Immediate to 15 days
JD-
- Strong System Verilog & UVM experience
- Mandatory: PCIe Gen4/Gen5/Gen6 and/or CXL Verification
- Testbench Development, Scoreboards, Assertions, Functional Coverage
- Protocol Debugging & Regression Analysis
- VCS, Xcelium/Questa, Verdi
If anyone interested, please share your profile to my mail id
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