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About the Role
Hi All,
ACL Digital is hiring #Senior #Design #Verification Engineer!
Experience: 4 Years
Location: Bangalore / Hyderabad
Notice Period: Immediate to 30 Days Preferred!
We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of protocols such as AXI, APB, PCIe, and DDR.
Thanks,
K Himabindu
ACL Digital is hiring #Senior #Design #Verification Engineer!
Experience: 4 Years
Location: Bangalore / Hyderabad
Notice Period: Immediate to 30 Days Preferred!
We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of protocols such as AXI, APB, PCIe, and DDR.
Thanks,
K Himabindu
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