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📍 Location
Surat
⏰ Job Type
Full-time
📅 Posted
June 07, 2026

About the Role

Experience: 6–15 Years

Locations: Chennai | Bangalore | Hyderabad

Department: Semiconductor / ASIC / SoC Engineering

🌟 About the Role

HCLTech is looking for a highly accomplished Design Verification Engineer (DV) to lead verification for our most critical ASIC and SoC programs. This is a senior technical leadership role that demands deep expertise in verification methodologies and a proven ability to drive large‑scale verification projects from strategy to sign‑off.

If you are passionate about building next‑generation silicon with world‑class quality, this opportunity is for you.

🔧 Key Responsibilities

  • Lead and define end‑to‑end verification strategy for complex ASIC/SoC programs
  • Architect and develop robust UVM-based verification environments and testbenches
  • Leverage advanced verification methodologies—UVM, Formal Verification, Assertions
  • <...

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